[ ASPLOS 2013 ]
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Efficient Virtualization on Embedded Power Architecture Platforms
I quote one of our ASPLOS 2013 reviewers:
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I find it extremely interesting to observe how
a small set of seemingly
innocuous architectural differences between Power and x86 leads to
completely different "locally optimal" BT virtualization approaches
(comparing this approach with the one outlined in the Adams paper [4]).
These differences are: x86 has segmentation, Power has software-loaded
TLB and variable page sizes, Power has orthogonal rwx page permissions,
and x86 has variable length instructions.
It is almost like asking, how would the universe differ if the fine
structure constant had a value of 0.00829 instead of 0.00729.
Answer: a lot!
For this reason, I think the paper is a very good fit for ASPLOS. Even
if architects do their best to think carefully about ramifications of
their choices, this paper is an eye opener into a world of, probably,
unforeseen consequences. As such, like it very much. And I think it should
be a must-read for current and future architects (and not just narrowly
from a virtualization point of view).
---end quote---
Thank you dear (anonymous) reviewer for liking our work!
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